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Simple Implementation of MIPS Subset

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Reaching to the simplest possible technique of the implementation of the MIPS subset has been made easy with the database segment and the addition of the control lines. The other things which are needed here are the branch equal, load word, arithmetic-logical instructions.

Creation of the single datapath

We have seen the building of the data path in the previous article as well. This is the simplest data path which can be attempted for the implementation of the instructions in one clock cycle. Yes, you got it right. There is only one-time usage of the data path resource by one instruction. If any of the instruction need the resource more than once, then they are needed to be duplicated. In this case, for the separation of instruction from the data, we need memory. There is a need of the duplication of the individual data paths which we have discussed previously. It can happen with sharing of the multiple and different types of instructions. For this, allowing the multiple connections in the element to the input to the control signal is necessary. Here, the role of the multiplexor comes. It helps in achieving with the device. The name which is given to the device is data selector.

We should have knowledge of the MIPS Subset Implementation before reading the simple implementation.

What does the combined datapath includes?

  1. Memory for instructions
  2. Separate memory for data

What does it need?

  1. ALU (for the execution of the instruction and that too in the same clock cycle)
  2. Adder (Program counter is incremented with the help of the adder)

The next step is the combination of the all the pieces for making a simple datapath MIPS architecture. This has been made possible by the addition of the datapath and that too for all the branches. For the comparison of the operands in the register, what we need to do is use Main ALU. That is why the adder is kept in the system for the branch target address computation.

Why do we need an additional multiplexor?

It is needed for the selection one of the branch target address which has to be written in the program counter and the sequential following instruction address, i.e. PC+4. It is due to the fact that the program counter gets the two of the above values written in it and that too on every clock. The best thing is that there is no requirement of the explicit write control signal.

Yes, we are done with the simple datapath, now we need to add the control unit. But the control unit must be able to take the inputs generated by the system. The second thing is that it must know how to generate the signal written for each statement. It should fulfill the requirements of the selector control for every multiplexor and of the arithmetic logic unit.

ALU Control

There are various distinctions in the ALU control. The basic advantage of ALU unit is that it makes the designing easy when we first design the unit rather than the rest of the control unit.

There are three control inputs of ALU control.

  1. 000- And
  2. 001- Or
  3. 010- Add
  4. 110- Subtract
  5. 111- Set-on-less-than

As per the instruction and the input, the ALU control performs the operation and result in giving the desired result.

  • load and store instructions

ALU is helpful in the computation of the memory address by resulting in the addition of the input.

  • R-type instructions-

Need of ALU for the performance of one from the five action. These are the addition, subtraction, OR, set-one-less-than. The operation or the function depends on the low-order instruction 6-bit function’s value field.

  • Branch equal

ALU is required for the subtraction.

Generation of the 3-bit ALU Control Input takes place with the help of the small control unit. That unit must have-

  1. The instruction’s function field ad inputs and
  2. 2-bit control field

These are called ALUOp. It indicates that the-

  1. Add (00)- for load and store operation
  2. Subtract (01)- branch equal, beq
  3. OR (10)- operation encoded in the function field

Output of ALU Control Unit

The memory address of the output is 3-bit signal. ALU gets directly controlled by these. It is because they generate one combinations from five. Setting the ALU control inputs is also necessary and these are to be based on the 2-bit ALUOp control as well as function code of 6-bits.

Different ways of the mapping implementation

There are numerous options and ways available with us for the implementation of the mapping from ALUOp of 2-bits. The function code field to three operation control bits of ALU which is of 6-bits also lie in the same category. It happens because number of bits which are of interest are only 64. Also, we use the function field only when the bit size of ALUOp is 10. Recognition of the subset is made possible with a small piece of logic. It also helps in the correct setting of the control bits of ALU.

It is an important step in the logic designing. It seems to be useful in the step of the creation of the truth table. Here, we get function code field combinations and bits of ALUOp. 3-bit ALU control unit depends on two types of input field.

The size of the full truth table is very huge. Also there is no usage of the ALU Control for most of the combinations of input. ALU Control is required for getting the entries of the truth table.

Logic block for ALU Control Function implementation

There are three distinct outputs of the logic block. There are three bits of the ALU control and they work corresponding to one of three bits. The construction of the logic function for every output is done with the combination of the entries which have been done in the particular output.

Designing of the Main Control Unit

For the beginning of the process, we need to identify the required components of the instruction and all the control lines. They are needed for data path that have been constructed. For the understanding of the function of buses, they are to be added for routing of the instruction pieces to the data path. They are advantageous as they help in reviewing the formats of the all the three types of instructions.

These are R-type, branch and load and store instructions.

The other task is the observation of the instructions and their format on which the designer relies. These are the-

  1. Opcode- The op field which always contain the bits from 31 to 26 is called opcode.
  2. Registers- These are to be read specifically by the names, rs and rt fields. This factor is true for store instruction, R-type instructions, and branch equal.
  3. Base Register- These are needed in the instructions for load and store.
  4. Branch Equal- It is of 16-bit. The instructions such as load and store contain it.
  5. Designation Register- They are available in one or two places. Therefore, for the selection of the field of the instruction, we need multiplexor. They are needed for giving the indication of the to be written register number.

This information can be helpful in adding the instruction labels and extra multiplexor into the simple datapath.

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